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Verilog: fix for synthesis of continuous assignments Syntactic checks #1508: Pull request #779 synchronize by kroening
October 18, 2024 16:39 1m 27s continuous_assignment1
continuous_assignment1
October 18, 2024 16:39 1m 27s
Merge pull request #780 from diffblue/assume2 Build and Test HW-CBMC #2674: Commit 5f54fcf pushed by tautschnig
October 18, 2024 16:09 6m 12s main
main
October 18, 2024 16:09 6m 12s
EBMC: retain assumptions when using --property Build and Test HW-CBMC #2673: Pull request #780 synchronize by kroening
October 18, 2024 13:30 5m 53s assume2
assume2
October 18, 2024 13:30 5m 53s
EBMC: retain assumptions when using --property Syntactic checks #1507: Pull request #780 synchronize by kroening
October 18, 2024 13:30 1m 46s assume2
assume2
October 18, 2024 13:30 1m 46s
EBMC: retain assumptions when using --property Syntactic checks #1506: Pull request #780 opened by kroening
October 18, 2024 13:21 1m 31s assume2
assume2
October 18, 2024 13:21 1m 31s
EBMC: retain assumptions when using --property Build and Test HW-CBMC #2672: Pull request #780 opened by kroening
October 18, 2024 13:21 6m 59s assume2
assume2
October 18, 2024 13:21 6m 59s
Verilog: fix for synthesis of continuous assignments Build and Test HW-CBMC #2671: Pull request #779 opened by kroening
October 18, 2024 13:09 5m 49s continuous_assignment1
continuous_assignment1
October 18, 2024 13:09 5m 49s
Verilog: fix for synthesis of continuous assignments Syntactic checks #1505: Pull request #779 opened by kroening
October 18, 2024 13:09 1m 31s continuous_assignment1
continuous_assignment1
October 18, 2024 13:09 1m 31s
Merge pull request #778 from diffblue/ebmc-5-3-version Build and Test HW-CBMC #2670: Commit 88a0e54 pushed by tautschnig
October 18, 2024 11:32 5m 54s main
main
October 18, 2024 11:32 5m 54s
EBMC 5.3 version bump and changelog Syntactic checks #1504: Pull request #778 opened by kroening
October 18, 2024 11:29 2m 2s ebmc-5-3-version
ebmc-5-3-version
October 18, 2024 11:29 2m 2s
EBMC 5.3 version bump and changelog Build and Test HW-CBMC #2669: Pull request #778 opened by kroening
October 18, 2024 11:29 5m 46s ebmc-5-3-version
ebmc-5-3-version
October 18, 2024 11:29 5m 46s
Merge pull request #776 from diffblue/sequence4-fix Build and Test HW-CBMC #2668: Commit 76c065e pushed by tautschnig
October 18, 2024 09:50 15m 1s main
main
October 18, 2024 09:50 15m 1s
Merge pull request #777 from diffblue/implicit-net-port Build and Test HW-CBMC #2667: Commit b970dd2 pushed by tautschnig
October 18, 2024 09:50 14m 31s main
main
October 18, 2024 09:50 14m 31s
Verilog: fix for implicit nets for port connections Build and Test HW-CBMC #2666: Pull request #777 opened by kroening
October 17, 2024 21:36 14m 39s implicit-net-port
implicit-net-port
October 17, 2024 21:36 14m 39s
Verilog: fix for implicit nets for port connections Syntactic checks #1503: Pull request #777 opened by kroening
October 17, 2024 21:36 1m 30s implicit-net-port
implicit-net-port
October 17, 2024 21:36 1m 30s
verilog/SVA/sequence4 test passes Syntactic checks #1502: Pull request #776 synchronize by kroening
October 17, 2024 21:26 1m 22s sequence4-fix
sequence4-fix
October 17, 2024 21:26 1m 22s
verilog/SVA/sequence4 test passes Build and Test HW-CBMC #2665: Pull request #776 synchronize by kroening
October 17, 2024 21:26 6m 1s sequence4-fix
sequence4-fix
October 17, 2024 21:26 6m 1s
verilog/SVA/sequence4 test passes Syntactic checks #1501: Pull request #776 opened by kroening
October 17, 2024 21:06 1m 29s sequence4-fix
sequence4-fix
October 17, 2024 21:06 1m 29s
verilog/SVA/sequence4 test passes Build and Test HW-CBMC #2664: Pull request #776 opened by kroening
October 17, 2024 21:06 14m 54s sequence4-fix
sequence4-fix
October 17, 2024 21:06 14m 54s
Merge pull request #774 from diffblue/sva_sequence_consecutive_repeti… Build and Test HW-CBMC #2663: Commit b72f0c4 pushed by tautschnig
October 17, 2024 20:25 15m 15s main
main
October 17, 2024 20:25 15m 15s
Merge pull request #775 from diffblue/typename Build and Test HW-CBMC #2662: Commit ae1d74b pushed by tautschnig
October 17, 2024 20:19 9m 58s main
main
October 17, 2024 20:19 9m 58s
Verilog: $typename Build and Test HW-CBMC #2661: Pull request #775 opened by kroening
October 17, 2024 18:05 10m 49s typename
typename
October 17, 2024 18:05 10m 49s
Verilog: $typename Syntactic checks #1500: Pull request #775 opened by kroening
October 17, 2024 18:05 1m 29s typename
typename
October 17, 2024 18:05 1m 29s
SVA: consecutive repetition Syntactic checks #1499: Pull request #774 synchronize by kroening
October 17, 2024 16:55 1m 30s sva_sequence_consecutive_repetition
sva_sequence_consecutive_repetition
October 17, 2024 16:55 1m 30s
SVA: consecutive repetition Build and Test HW-CBMC #2660: Pull request #774 synchronize by kroening
October 17, 2024 16:55 8m 10s sva_sequence_consecutive_repetition
sva_sequence_consecutive_repetition
October 17, 2024 16:55 8m 10s