[hw,mbx] Sync mailbox from integrated_dev to master

[Razer6]

No description provided.

[hcallahan-lowrisc]

Something strange is still going on with changes moving between the commits here, for example the very first commit 2f368f1 contains changes to hw/Makefile which should be part of 9f5c649. (That commit on integrated_dev 3c94fe2 does contain the makefile changes).

[Razer6]

Well that is at least explainable. I added the hw/Makefile change manually but didn't the explicit commit on that. Should I move that to the other one?

[hcallahan-lowrisc]

You can leave it for now, as I'm comparing changes commit-by-commit it makes it trickier to follow if things are moving around between commits. As long as there's not too much stuff like that I can probably manage.

[hcallahan-lowrisc]

Reviewed at e029452

Review tool output

Number of commits in original branch : 86
Number of commits in migration branch : 88
WARNING: the following 2 commits may have been added:
Added commit : 541dd75f208e [hw,mbx] Update source files with new license header
Added commit : e0294522c658 [hw,mbx] Update bazel rules for generating C/Rust headers
Shared commits:
[  0] f439134ef687 2f368f1b8a47 : [hw,mbx,rtl] RTL skeleton for DOE Mailbox 
[  1] 1c6c11741494 f214e7b0caca : [hw,mbx,rtl] Implementation of the host interface 
[  2] 1cf785539f2e fd0181965f48 : [hw,mbx,rtl] Added IRQ primitive 
[  3] 978e5c55c5b8 e55ae11c028d : [hw,mbx,rtl] Rename set/clear signals for better meaning 
[  4] 0a2ca184b210 296a6acbaea7 : [hw,rtl,mbx] System register interface implementation 
[  5] 74db9b8458be 8b28952579c5 : [hw,mbx,rtl] External control register 
[  6] 240988180280 d7b3d4c4f8bb : [hw,mbx,rtl] Implement DOE IRQ support 
[  7] d53012698875 b531818fa44c : [hw,mbx,rtl] FW2FW IRQ registers 
[  8] 697b265122fa c15926c85112 : [mbx,doc] Initial ingestion of mailbox spec 
[  9] e839da269d70 fc073d10d364 : [hw,mbx,rtl] Add countermeasure testplan 
[ 10] 832ab20ef690 33b8e23346a0 : [hw,mbx,rtl] Implement SRAM arbiter 
[ 11] 0a2b5e8478a7 fa895d7ca126 : [hw,mbx,rtl] Inbound mailbox implementation 
[ 12] 475aa0a08c1e d0d82857e62f : [hw,mbx,rtl] Simplify and fix signal assignments 
[ 13] 12229e748a36 741e44a78f15 : [hw,mbx,rtl] Refactor top-level signalling and naming 
[ 14] e2775b86ade3 befec22e7b1a : [hw,mbx,rtl] Adaptions to the signaling 
[ 15] 6cfc94ea41e4 f72132288f9b : [hw,mbx,rtl] Use Mubi-regwen for range config 
[ 16] d5494d5022c8 e8b300e5f384 : [hw,mbx,rtl] No IRQ muxing between ready and abort 
[ 17] 4d480fb5372a aa2ad5091c5f : [hw,mbx,rtl] Make DOE Interrupt Addr/Data an alias to host interface 
[ 18] d0b8e724893d d8c98552306d : [hw,mbx,rtl] Recoverable alert on invalid memory access 
[ 19] 68c211772acb d533e83ab25c : [hw,mbx,rtl] Remove Async message support registers 
[ 20] aed591a6a0bf 256b98795a29 : [hw,mbx,rtl] Remove hostif.status.ready register 
[ 21] 88b06fe07a5d 6ae3245ec1d6 : [hw,mbx,rtl] Outbound mailbox implementation 
[ 22] 26f620b8efc2 a47b7a9f360e : [hw,mbx,rtl] Clarifications to the ombx signalling 
[ 23] d944b0d767b5 ae10c2207f9e : [hw,mbx,rtl] Let the ombx create the DOE interrupt 
[ 24] 5e0193f2e993 127808085b71 : [mbx] Rename OT-facing port to `core` 
[ 25] 61b9d6fd5f23 62a27afed659 : [mbx] Rename SoC-facing port to `soc` 
[ 26] c69cc5e72cfe 671b1ca939f4 : [mbx/rtl] Fix signal names of TL-UL `sram` ports 
[ 27] cb562bfab073 5ef9a7199cae : [mbx/rtl] Add missing reg WE onehot check assertion 
[ 28] 47dd9771b8f6 376088cf099d : [mbx/rtl] Add missing connections to/from `mbx_soc_reg_top` 
[ 29] 3cc3af9c49c3 04589fe44864 : [hw,mbx,rtl] Move error bit from HOST.STATUS to HOST.CONTROL 
[ 30] 139e72bb6769 762c39badb2a : [hw,mbx,rtl] Invalid range config sets busy 
[ 31] 14744279dcf6 f34afd0429f8 : [hw,mbx,rtl] Make registers explicitly read-only in hardware 
[ 32] 424e50afe822 a860c072c86d : [hw,mbx,rtl] More concise register definition 
[ 33] a81183fa5e3e 8f1713c4f1f2 : [hw,mbx,rtl] Rename DOE IRQ signals on host side 
[ 34] e03196464657 391fceacc3cb : [hw,mbx,rtl] Raise a system IRQ if host raises an error 
[ 35] 664199cd6dc7 f6cb5897384a : [hw,mbx,rtl] Busy is fully hardware controlled 
[ 36] 354ea3b1fd6d 063d5aa341ab : [hw,mbx,rtl] Fix permissions on CORE.STATUS and SOC.CONTROL 
[ 37] 3c94fe27ae0b 9f5c6498889f : [hw,mbx,rtl] Add mbx to makefile and fix comment 
[ 38] b3ab451fb261 bcecadb01bab : [mbx/rtl] Comment broken assertions out 
[ 39] 9480c5e8bce1 5a4c191ebd0f : [mbx] Exclude most CSRs from automated tests 
[ 40] 9ee2729fa294 997f00f51b0c : [sw/mbx] Add scaffold of DIF 
[ 41] 9f241b57c17f c0ea37f08b0f : [hw,mbx,rtl] Fix undriven signals and busy clear 
[ 42] 0aefd0e0ce94 2858ef948de4 : [mbx] Advance pointer on initial write 
[ 43] 479218647d12 87b557dbc564 : [hw,mbx,rtl] Fix linting errors on mailbox 
[ 44] 447c6ffea469 a5759024bb6e : [mbox/lint] Fix a concatenation error 
[ 45] 486112833f8b b7e48a068847 : [mbx/lint] Update waiver 
[ 46] 6d22e32b9a8d 8f9b9f508321 : [mbx] Stable Ready bit required in ombx assertion 
[ 47] 5b3d18b2b70a d3ef3bd6d086 : [mbx] Assertion improvements 
[ 48] d87e49bb5253 aacc0bfbfedc : [mbx, dv] - First pass mbx ip dv enviorment and smoke test 
[ 49] 5cb0dba5a92f 199c111c24b9 : [dv,darjeeling] Include DMA and MBX smoke tests in CI 
[ 50] 94a7fbb99f0e a3b15fbfe935 : [mbx,dv] Dv tweaks to get csr tests running in the smoke regression 
[ 51] da07c2bcf5a9 d80e65a0f1f3 : [hw,mbx,rtl] Defer IRQ generation until write response received 
[ 52] 3c4a0346b850 7ee1f2f65805 : [hw,mbx] Make lint clean for unused signal 
[ 53] 8ffcae51497c 809f50816611 : [hw,mbx,rtl] Gate all valid received with current request 
[ 54] 1b0270f9eb61 c0916e7367ec : [hw,mbx,rtl] Use the transition to Read or to Abort state to generate IRQ 
[ 55] fe7e309c00d7 0e3161b17be6 : [hw,mbx,rtl] Initialize the outbound read ptr when range becomes valid 
[ 56] f315d5de88bb c1a105ed5e3b : [mbx] Correct assertion and updating of OUTBOUND_OBJECT_SIZE 
[ 57] 7d2a40351e9d 8db41f073d1b : [hw,mbx,rtl] Add CSR registers for asynchronous message support 
[ 58] 6557ab1c9ff7 bb9f64e01694 : [hw,mbx,rtl] Add top-level strap for async message support 
[ 59] d978e77ea7e2 524be58e3770 : [mbx, dv] Refactor tb interrupt functionality 
[ 60] ddb3b34397f0 d148dba2d1c6 : [mbx,dv] Add IRQ usage to mailbox smoke 
[ 61] 3695f88a8d34 dc983ad01f65 : [hw,mbx,rtl] Trigger an error for out-of-bounds imbx write 
[ 62] bb2f84a3b6c6 272244719d79 : [hw,mbx,rtl] Add an error IRQ to notify host 
[ 63] 62b943b7bcd6 eb77d02c3ab2 : [hw,mbx,dv] Add new interrupt to the DV environment 
[ 64] d0061cc81201 9953efbd4a81 : [dv,mbx] Changes for vcs support 
[ 65] 48d17d66f6b5 d23f500997b5 : [mbx] Fault recovery via Abort mechanism 
[ 66] 4dab3608a3f9 a9cb33699a73 : [mbx] Abort acknowledgement always resets FSMs. 
[ 67] e62b58cb5bd8 f6c2ef2d31bf : [mbx] Reset request count when abort cleared. 
[ 68] fabde06fa174 1049ed1577e5 : [mbx/dv] Create scaffold for testplan 
[ 69] 8a76893a5b80 168f0caa076a : [hw,mbx,rtl] Use the transition to the Read/Abort to generate the IRQ 
[ 70] d4cadf5d2b74 6cd737cc2f30 : [mbx] Limit addresses are inclusive 
[ 71] 1b4e3d99d8bb 923e15cf4a18 : [dv,mbx] Tidying, restructuring and minor fixes. 
[ 72] 063e604e4820 64e663db1de3 : [dv,mbx] Extended smoke sequence 
[ 73] f84cd8eebc25 ff139b59929a : [dv,mbx] Placeholder stress sequence. 
[ 74] d59e02d20c36 768a94f57389 : [dv,mbx] Extended stress testing 
[ 75] 07b7feaad6a7 8e19d6c2e389 : [dv,mbx] Vary TL-UL access/response timings. 
[ 76] 8476632694c8 4d87e284c3db : [dv,mbx] Reduce num_iters/num_txns for mbx_stress to avoid timeouts 
[ 77] 78d9e4424a78 1ca90d814be0 : [mbx,dv] Test hw mechanism for reporting imbx oob 
[ 78] 92295b19432b dfe9fa195dfa : [hw,mbx,rtl] Gate the AsyncMsg support with feature strap and enable 
[ 79] 4bff46835d54 8e71c9a0beb7 : [hw,mbx,rtl] No direct prim_generic_flop instances 
[ 80] 0d61ea543e12 c9efb359bd67 : [hw,mbx,rtl] Clear interrupts when acknowledging an abort 
[ 81] c62cf5498329 79f6bb06db58 : [hw,mbx,dv] Disable not implemented stress tests 
[ 82] ea2d4606c555 beedd484958d : [mbx/dv] Separate `mbx_stress` from `mbx_stress_all` in testplan 
[ 83] 4469744f91de 132f38bd3c04 : [mbx/dv] Add `mbx_stress_zero_delays` test to `mbx_stress` test point 
[ 84] f0ee8f0c367e ed9574f2c434 : [mbx/dv] Add test point for out-of-bound inbound mailbox accesses 
[ 85] b3f06722334f 941995074dc7 : [hw,mbx,rtl] Move SOC_INTR_ADDR/DATA registers to the end 
WARNING: [  0] Original commit f439134ef687 differs from migration commit 2f368f1b8a47 (title = [hw,mbx,rtl] RTL skeleton for DOE Mailbox).
WARNING: [  1] Original commit 1c6c11741494 differs from migration commit f214e7b0caca (title = [hw,mbx,rtl] Implementation of the host interface).
WARNING: [  4] Original commit 0a2ca184b210 differs from migration commit 296a6acbaea7 (title = [hw,rtl,mbx] System register interface implementation).
WARNING: [  6] Original commit 240988180280 differs from migration commit d7b3d4c4f8bb (title = [hw,mbx,rtl] Implement DOE IRQ support).
WARNING: [  7] Original commit d53012698875 differs from migration commit b531818fa44c (title = [hw,mbx,rtl] FW2FW IRQ registers).
WARNING: [  8] Original commit 697b265122fa differs from migration commit c15926c85112 (title = [mbx,doc] Initial ingestion of mailbox spec).
WARNING: [ 15] Original commit 6cfc94ea41e4 differs from migration commit f72132288f9b (title = [hw,mbx,rtl] Use Mubi-regwen for range config).
WARNING: [ 16] Original commit d5494d5022c8 differs from migration commit e8b300e5f384 (title = [hw,mbx,rtl] No IRQ muxing between ready and abort).
WARNING: [ 17] Original commit 4d480fb5372a differs from migration commit aa2ad5091c5f (title = [hw,mbx,rtl] Make DOE Interrupt Addr/Data an alias to host interface).
WARNING: [ 18] Original commit d0b8e724893d differs from migration commit d8c98552306d (title = [hw,mbx,rtl] Recoverable alert on invalid memory access).
WARNING: [ 19] Original commit 68c211772acb differs from migration commit d533e83ab25c (title = [hw,mbx,rtl] Remove Async message support registers).
WARNING: [ 20] Original commit aed591a6a0bf differs from migration commit 256b98795a29 (title = [hw,mbx,rtl] Remove hostif.status.ready register).
WARNING: [ 24] Original commit 5e0193f2e993 differs from migration commit 127808085b71 (title = [mbx] Rename OT-facing port to `core`).
WARNING: [ 25] Original commit 61b9d6fd5f23 differs from migration commit 62a27afed659 (title = [mbx] Rename SoC-facing port to `soc`).
WARNING: [ 29] Original commit 3cc3af9c49c3 differs from migration commit 04589fe44864 (title = [hw,mbx,rtl] Move error bit from HOST.STATUS to HOST.CONTROL).
WARNING: [ 32] Original commit 424e50afe822 differs from migration commit a860c072c86d (title = [hw,mbx,rtl] More concise register definition).
WARNING: [ 33] Original commit a81183fa5e3e differs from migration commit 8f1713c4f1f2 (title = [hw,mbx,rtl] Rename DOE IRQ signals on host side).
WARNING: [ 35] Original commit 664199cd6dc7 differs from migration commit f6cb5897384a (title = [hw,mbx,rtl] Busy is fully hardware controlled).
WARNING: [ 36] Original commit 354ea3b1fd6d differs from migration commit 063d5aa341ab (title = [hw,mbx,rtl] Fix permissions on CORE.STATUS and SOC.CONTROL).
WARNING: [ 37] Original commit 3c94fe27ae0b differs from migration commit 9f5c6498889f (title = [hw,mbx,rtl] Add mbx to makefile and fix comment).
WARNING: [ 40] Original commit 9ee2729fa294 differs from migration commit 997f00f51b0c (title = [sw/mbx] Add scaffold of DIF).
WARNING: [ 41] Original commit 9f241b57c17f differs from migration commit c0ea37f08b0f (title = [hw,mbx,rtl] Fix undriven signals and busy clear).
WARNING: [ 46] Original commit 6d22e32b9a8d differs from migration commit 8f9b9f508321 (title = [mbx] Stable Ready bit required in ombx assertion).
WARNING: [ 48] Original commit d87e49bb5253 differs from migration commit aacc0bfbfedc (title = [mbx, dv] - First pass mbx ip dv enviorment and smoke test).
WARNING: [ 49] Original commit 5cb0dba5a92f differs from migration commit 199c111c24b9 (title = [dv,darjeeling] Include DMA and MBX smoke tests in CI).
WARNING: [ 57] Original commit 7d2a40351e9d differs from migration commit 8db41f073d1b (title = [hw,mbx,rtl] Add CSR registers for asynchronous message support).
WARNING: [ 58] Original commit 6557ab1c9ff7 differs from migration commit bb9f64e01694 (title = [hw,mbx,rtl] Add top-level strap for async message support).
WARNING: [ 60] Original commit ddb3b34397f0 differs from migration commit d148dba2d1c6 (title = [mbx,dv] Add IRQ usage to mailbox smoke).
WARNING: [ 62] Original commit bb2f84a3b6c6 differs from migration commit 272244719d79 (title = [hw,mbx,rtl] Add an error IRQ to notify host).
WARNING: [ 70] Original commit d4cadf5d2b74 differs from migration commit 6cd737cc2f30 (title = [mbx] Limit addresses are inclusive).
WARNING: [ 71] Original commit 1b4e3d99d8bb differs from migration commit 923e15cf4a18 (title = [dv,mbx] Tidying, restructuring and minor fixes.).
WARNING: [ 85] Original commit b3f06722334f differs from migration commit 941995074dc7 (title = [hw,mbx,rtl] Move SOC_INTR_ADDR/DATA registers to the end).

Between the commits with changes, there are number of common patterns that I will outline here to avoid repetition:

• License header changes due to the added commit 541dd75 -> This causes changes through all commits which create new files.
• Autogenerated changes to register files (reg_pkg/reg_top) have a number of common differences:
  • The addition of a .Mubi field for SW regs, as [reggen] Add support for multi-bit regwen signals #19575 was previously ported to master.
  • Merging of [reggen] Remove the devmode input #20861 upstream means that devmode inputs have been removed.

List of commits added to the migration branch Razer6/sync-mbx-to-master

541dd75 [hw,mbx] Update source files with new license header

This is just a comment update. OK.

e029452 [hw,mbx] Update bazel rules for generating C/Rust headers

Updating bazel BUILD file to match new upstream tooling. OK.

List of commits with changes between integrated_dev and the migration branch Razer6/sync-mbx-to-master

[ 0] 2f368f1 [hw,mbx,rtl] RTL skeleton for DOE Mailbox.

• +diff --git a/hw/Makefile b/hw/Makefile
  ++ mbx added to list of blocks in migration branch, but not in original branch.
  This change should be part of 9f5c649 instead, but isn't very important.
• Removal of top_darjeeling lint cfgs. OK.
• Removal of mbx from KNOWN_CIP_IDS in util/reggen/ip_block.py. This change was already migrated in [reggen] Reserve CIP IDs for Integrated IPs #22226.
• Autogenerated reggen changes.

[ 1] f214e7b [hw,mbx,rtl] Implementation of the host interface.

• Autogenerated reggen changes.

[ 4] 296a6ac [hw,rtl,mbx] System register interface implementation.

• Autogenerated reggen changes.

[ 6] d7b3d4c [hw,mbx,rtl] Implement DOE IRQ support.

• Autogenerated reggen changes.

[ 7] b531818 [hw,mbx,rtl] FW2FW IRQ registers.

• Autogenerated reggen changes.

[ 8] c15926c [mbx,doc] Initial ingestion of mailbox spec.

• Addition of the mailbox component to SUMMARY.md (adding it to the navbar in the documentation book) was not migrated.

[ 15] f721322 [hw,mbx,rtl] Use Mubi-regwen for range config.

• Autogenerated reggen changes.

[ 16] e8b300e [hw,mbx,rtl] No IRQ muxing between ready and abort.

• Autogenerated reggen changes.

[ 17] aa2ad50 [hw,mbx,rtl] Make DOE Interrupt Addr/Data an alias to host interface.

• Autogenerated reggen changes.

[ 18] d8c9855 [hw,mbx,rtl] Recoverable alert on invalid memory access.

• Autogenerated reggen changes.

[ 19] d533e83 [hw,mbx,rtl] Remove Async message support registers.

• Autogenerated reggen changes.

[ 20] 256b987 [hw,mbx,rtl] Remove hostif.status.ready register.

• Autogenerated reggen changes.

[ 24] 1278080 [mbx] Rename OT-facing port to core.

• Autogenerated reggen changes.

[ 25] 62a27af [mbx] Rename SoC-facing port to soc.

• Autogenerated reggen changes.

[ 29] 04589fe [hw,mbx,rtl] Move error bit from HOST.STATUS to HOST.CONTROL.

• Autogenerated reggen changes.

[ 32] a860c07 [hw,mbx,rtl] More concise register definition.

• Autogenerated reggen changes.

[ 33] 8f1713c [hw,mbx,rtl] Rename DOE IRQ signals on host side.

• Autogenerated reggen changes.

[ 35] f6cb589 [hw,mbx,rtl] Busy is fully hardware controlled.

• Autogenerated reggen changes.

[ 36] 063d5aa [hw,mbx,rtl] Fix permissions on CORE.STATUS and SOC.CONTROL.

• Autogenerated reggen changes.

[ 37] 9f5c649 [hw,mbx,rtl] Add mbx to makefile and fix comment.

• +diff --git a/hw/Makefile b/hw/Makefile
  ++ mbx not added to list of blocks in migration branch, but was in original branch.
  This change has been moved to 2f368f1 in the migration branch.

[ 40] 997f00f [sw/mbx] Add scaffold of DIF.

• Remove mbx DIF and associated BUILD files.
  These have been moved to a seperate PR. [hw,mbx,dif] Sync MBX DIF from integrated_dev to Master  #24619

[ 41] c0ea37f [hw,mbx,rtl] Fix undriven signals and busy clear.

• Autogenerated reggen changes.

[ 46] 8f9b9f5 [mbx] Stable Ready bit required in ombx assertion.

• Autogenerated reggen changes.

[ 48] aacc0bf [mbx, dv] - First pass mbx ip dv enviorment and smoke test.

• Formatting changes (mostly wrapping long lines) to the /hw/ip/mbx/dv/env/mbx_scoreboard.sv. OK.

[ 49] 199c111 [dv,darjeeling] Include DMA and MBX smoke tests in CI.

• Removal of changes to top_darjeeling sim cfgs. OK.

[ 57] 8db41f0 [hw,mbx,rtl] Add CSR registers for asynchronous message support.

• Autogenerated reggen changes.

[ 58] bb9f64e [hw,mbx,rtl] Add top-level strap for async message support.

• Autogenerated reggen changes.
• Large diff (removal) of changes to top_darjeeling files. OK.

[ 60] d148dba [mbx,dv] Add IRQ usage to mailbox smoke.

• No relevant changes.

[ 62] 2722447 [hw,mbx,rtl] Add an error IRQ to notify host.

• Autogenerated reggen changes.
• Large diff (removal) of changes to top_darjeeling files, plus some hardcoded unittests (e.g. plic). OK.

[ 70] 6cd737c [mbx] Limit addresses are inclusive.

• Remove further mbx DIF files/changes.
  These have been moved to a seperate PR. [hw,mbx,dif] Sync MBX DIF from integrated_dev to Master  #24619

[ 71] 923e15c [dv,mbx] Tidying, restructuring and minor fixes..

• Formatting changes (mostly wrapping long lines) to the /hw/ip/mbx/dv/env/mbx_scoreboard.sv. OK.

[ 85] 9419950 [hw,mbx,rtl] Move SOC_INTR_ADDR/DATA registers to the end.

• Autogenerated reggen changes.

Summary

All the changes here appear ok to me.
The only missing point is the addition of the mailbox component to SUMMARY.md in c15926c. But this is low-priority, and could be fixed up later on.

[hcallahan-lowrisc]

CHANGE AUTHORIZED: hw/ip/mbx/rtl/mbx.sv
CHANGE AUTHORIZED: hw/ip/mbx/rtl/mbx_core_reg_top.sv
CHANGE AUTHORIZED: hw/ip/mbx/rtl/mbx_fsm.sv
CHANGE AUTHORIZED: hw/ip/mbx/rtl/mbx_hostif.sv
CHANGE AUTHORIZED: hw/ip/mbx/rtl/mbx_imbx.sv
CHANGE AUTHORIZED: hw/ip/mbx/rtl/mbx_ombx.sv
CHANGE AUTHORIZED: hw/ip/mbx/rtl/mbx_reg_pkg.sv
CHANGE AUTHORIZED: hw/ip/mbx/rtl/mbx_soc_reg_top.sv
CHANGE AUTHORIZED: hw/ip/mbx/rtl/mbx_sramrwarb.sv
CHANGE AUTHORIZED: hw/ip/mbx/rtl/mbx_sysif.sv

[Razer6]

Thanks @hcallahan-lowrisc for the review. Assigning it to @rswarbrick for a second approval and merge.

[rswarbrick]

CHANGE AUTHORIZED: hw/ip/mbx/rtl/mbx.sv
CHANGE AUTHORIZED: hw/ip/mbx/rtl/mbx_core_reg_top.sv
CHANGE AUTHORIZED: hw/ip/mbx/rtl/mbx_fsm.sv
CHANGE AUTHORIZED: hw/ip/mbx/rtl/mbx_hostif.sv
CHANGE AUTHORIZED: hw/ip/mbx/rtl/mbx_imbx.sv
CHANGE AUTHORIZED: hw/ip/mbx/rtl/mbx_ombx.sv
CHANGE AUTHORIZED: hw/ip/mbx/rtl/mbx_reg_pkg.sv
CHANGE AUTHORIZED: hw/ip/mbx/rtl/mbx_soc_reg_top.sv
CHANGE AUTHORIZED: hw/ip/mbx/rtl/mbx_sramrwarb.sv
CHANGE AUTHORIZED: hw/ip/mbx/rtl/mbx_sysif.sv