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    85 repositories

    • XiangShan

      Public
      Open-source high-performance RISC-V processor
      chiselrisc-vmicroarchitecture
      Scala
      •
      Mulan Permissive Software License, Version 2
      •864•6.8k•21•116•Updated Jan 17, 2026Jan 17, 2026

    • CoupledL2

      Public
      Open-source non-blocking L2 cache
      Scala
      •
      Other
      •32•52•0•21•Updated Jan 16, 2026Jan 16, 2026

    • difftest

      Public
      Modern co-simulation framework for RISC-V CPUs
      C++
      •
      Mulan Permissive Software License, Version 2
      •91•167•7•8•Updated Jan 16, 2026Jan 16, 2026

    • GEM5

      Public
      C++
      •
      BSD 3-Clause "New" or "Revised" License
      •61•122•17•56•Updated Jan 16, 2026Jan 16, 2026

    • XSAI

      Public
      A fork of Xiangshan for AI
      Scala
      •
      Mulan Permissive Software License, Version 2
      •864•36•6•0•Updated Jan 16, 2026Jan 16, 2026

    • CPU2006LiteWrapper

      Public
      Makefile
      •6•12•1•2•Updated Jan 16, 2026Jan 16, 2026

    • env-scripts

      Public
      Scripts for XiangShan
      Tcl
      •21•17•0•3•Updated Jan 16, 2026Jan 16, 2026

    • YunSuan

      Public
      This repo includes XiangShan's function units
      Scala
      •
      Mulan Permissive Software License, Version 2
      •15•29•0•1•Updated Jan 16, 2026Jan 16, 2026

    • bootcamp

      Public
      XiangShan bootcamp
      Jupyter Notebook
      •
      Creative Commons Attribution 4.0 International
      •1•2•0•0•Updated Jan 14, 2026Jan 14, 2026

    • HBL2

      Public
      Open-source non-blocking L2 cache, used in XS-AI system
      Scala
      •
      Other
      •32•2•0•0•Updated Jan 14, 2026Jan 14, 2026

    • XiangShan-Design-Doc

      Public
      Documentation for XiangShan Design
      Markdown
      •
      Creative Commons Attribution 4.0 International
      •17•40•3•6•Updated Jan 14, 2026Jan 14, 2026

    • XiangShan-doc

      Public
      Documentation for XiangShan
      Markdown
      •
      Creative Commons Attribution 4.0 International
      •151•432•7•4•Updated Jan 14, 2026Jan 14, 2026

    • qemu

      Public
      Official QEMU mirror. Please see https://www.qemu.org/contribute/ for how to submit changes to QEMU. Pull Requests are ignored. Please only use release tarballs from the QEMU website.
      C
      •
      Other
      •6.4k•3•0•2•Updated Jan 13, 2026Jan 13, 2026

    • CPU2017LiteWrapper

      Public
      Makefile
      •2•3•0•0•Updated Jan 13, 2026Jan 13, 2026

    • tutorial

      Public
      XiangShan Tutorial Website
      Markdown
      •
      Creative Commons Attribution 4.0 International
      •0•5•0•0•Updated Jan 13, 2026Jan 13, 2026

    • NEMU

      Public
      Super fast RISC-V ISA emulator for XiangShan processor
      risc-vrisc-v-emulator
      C
      •
      Other
      •119•306•21•14•Updated Jan 13, 2026Jan 13, 2026

    • Utility

      Public
      Scala
      •24•15•0•6•Updated Jan 12, 2026Jan 12, 2026

    • llvm-project

      Public
      The LLVM Project is a collection of modular and reusable compiler and toolchain technologies.
      LLVM
      •
      Other
      •16k•0•0•0•Updated Jan 12, 2026Jan 12, 2026

    • xfuzz

      Public
      Fuzzing General-Purpose Hardware Designs with Software Fuzzers
      Scala
      •
      Other
      •3•24•3•0•Updated Jan 11, 2026Jan 11, 2026

    • xs-env

      Public
      XiangShan Frontend Develop Environment
      Shell
      •
      Other
      •65•68•3•3•Updated Jan 11, 2026Jan 11, 2026

    • tl-test-new

      Public
      The Unified TileLink Memory Subsystem Tester for XiangShan
      C++
      •
      Mulan Permissive Software License, Version 2
      •1•12•0•2•Updated Jan 7, 2026Jan 7, 2026

    • XiangShan-User-Guide

      Public
      The User Guide of XiangShan.
      Markdown
      •
      Creative Commons Attribution 4.0 International
      •8•15•2•1•Updated Dec 30, 2025Dec 30, 2025

    • riscv-isa-sim

      Public
      Spike, a RISC-V ISA Simulator
      C
      •
      Other
      •1k•10•0•2•Updated Dec 29, 2025Dec 29, 2025

    • gsim

      Public
      C++
      •7•64•0•6•Updated Dec 27, 2025Dec 27, 2025

    • rocket-chip

      Public
      Rocket Chip Generator
      Scala
      •
      Other
      •1.2k•7•0•4•Updated Dec 26, 2025Dec 26, 2025

    • ready-to-run

      Public
      Shell
      •13•9•3•2•Updated Dec 26, 2025Dec 26, 2025

    • nexus-am

      Public
      C
      •47•42•8•7•Updated Dec 19, 2025Dec 19, 2025

    • OpenLLC

      Public
      Scala
      •
      Other
      •12•12•0•4•Updated Dec 16, 2025Dec 16, 2025

    • ChiselIOPMP

      Public
      An open-sourced Chisel implementation of the RISC-V I/O Physical Memory Protection (IOPMP).
      Scala
      •
      Mulan Permissive Software License, Version 2
      •0•1•0•0•Updated Dec 11, 2025Dec 11, 2025

    • ChiselAIA

      Public
      RISC-V AIA in Chisel
      chiselriscvinterruptaia
      Scala
      •
      Mulan Permissive Software License, Version 2
      •3•8•11•2•Updated Dec 11, 2025Dec 11, 2025