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    76 repositories

    • XiangShan

      Public
      Open-source high-performance RISC-V processor
      chiselrisc-vmicroarchitecture
      Scala
      •
      Other
      •790•6.5k•111•66•Updated Aug 1, 2025Aug 1, 2025

    • GEM5

      Public
      C++
      •
      BSD 3-Clause "New" or "Revised" License
      •49•92•20•45•Updated Aug 1, 2025Aug 1, 2025

    • xs-env

      Public
      XiangShan Frontend Develop Environment
      Shell
      •
      Other
      •59•64•3•2•Updated Aug 1, 2025Aug 1, 2025

    • env-scripts

      Public
      Scripts for XiangShan
      Verilog
      •15•17•0•2•Updated Aug 1, 2025Aug 1, 2025

    • ready-to-run

      Public
      Shell
      •11•8•3•2•Updated Jul 30, 2025Jul 30, 2025

    • NEMU

      Public
      C
      •
      Other
      •111•288•39•28•Updated Jul 30, 2025Jul 30, 2025

    • YunSuan

      Public
      This repo includes XiangShan's function units
      Scala
      •
      Mulan Permissive Software License, Version 2
      •13•27•0•0•Updated Jul 30, 2025Jul 30, 2025

    • difftest

      Public
      Modern co-simulation framework for RISC-V CPUs
      C++
      •
      Mulan Permissive Software License, Version 2
      •81•147•7•6•Updated Jul 30, 2025Jul 30, 2025

    • Utility

      Public
      Scala
      •24•14•0•4•Updated Jul 28, 2025Jul 28, 2025

    • XiangShan-doc

      Public
      Documentation for XiangShan
      Markdown
      •
      Creative Commons Attribution 4.0 International
      •144•419•7•4•Updated Jul 28, 2025Jul 28, 2025

    • CoupledL2

      Public
      Open-source non-blocking L2 cache
      Scala
      •
      Other
      •28•46•0•11•Updated Jul 25, 2025Jul 25, 2025

    • gsim

      Public
      C++
      •4•43•1•5•Updated Jul 24, 2025Jul 24, 2025

    • llvm-project

      Public
      The LLVM Project is a collection of modular and reusable compiler and toolchain technologies.
      LLVM
      •
      Other
      •15k•0•0•0•Updated Jul 24, 2025Jul 24, 2025

    • rocket-chip

      Public
      Rocket Chip Generator
      Scala
      •
      Other
      •1.2k•6•0•3•Updated Jul 22, 2025Jul 22, 2025

    • XiangShan-home

      Public
      Markdown
      •
      Creative Commons Attribution 4.0 International
      •0•0•0•0•Updated Jul 18, 2025Jul 18, 2025

    • tutorial

      Public
      XiangShan Tutorial Website
      Markdown
      •
      Creative Commons Attribution 4.0 International
      •0•5•0•0•Updated Jul 16, 2025Jul 16, 2025

    • XiangShan-User-Guide

      Public
      The User Guide of XiangShan.
      Markdown
      •
      Creative Commons Attribution 4.0 International
      •3•10•0•0•Updated Jul 15, 2025Jul 15, 2025

    • XiangShan-Design-Doc

      Public
      Documentation for XiangShan Design
      Markdown
      •
      Creative Commons Attribution 4.0 International
      •9•29•0•2•Updated Jul 15, 2025Jul 15, 2025

    • nexus-am

      Public
      C
      •36•35•7•4•Updated Jul 14, 2025Jul 14, 2025

    • XSPdb

      Public
      XSPdb is a Python-based extension of pdb designed for the XiangShan IP, providing GDB-like "interactive debugging" capabilities.
      Python
      •
      Mulan Permissive Software License, Version 2
      •3•7•1•1•Updated Jul 14, 2025Jul 14, 2025

    • docs-utils

      Public
      Utilities for XiangShan Document
      Python
      •
      Mulan Permissive Software License, Version 2
      •1•2•0•0•Updated Jul 13, 2025Jul 13, 2025

    • xfuzz

      Public
      Fuzzing General-Purpose Hardware Designs with Software Fuzzers
      Scala
      •
      Other
      •2•20•2•0•Updated Jul 10, 2025Jul 10, 2025

    • ChiselAIA

      Public
      RISC-V AIA in Chisel
      chiselriscvinterruptaia
      Scala
      •
      Mulan Permissive Software License, Version 2
      •3•7•11•2•Updated Jul 4, 2025Jul 4, 2025

    • tl-test-new

      Public
      The Unified TileLink Memory Subsystem Tester for XiangShan
      C++
      •
      Mulan Permissive Software License, Version 2
      •1•9•0•0•Updated Jun 19, 2025Jun 19, 2025

    • riscv-hyp-tests

      Public
      A bare-metal application to test specific features of the risc-v hypervisor extension
      C
      •
      GNU General Public License v3.0
      •22•3•0•1•Updated Jun 18, 2025Jun 18, 2025

    • OpenNCB

      Public
      Open-source Non-coherent CHI Bridge (CHI SN-F to AXI-4 bridge)
      buschiselchisel3socaxi4amba-axiamba-chiprotocol-bridge
      Scala
      •0•6•0•0•Updated Jun 12, 2025Jun 12, 2025

    • riscv-linux

      Public
      RISC-V Linux Port
      C
      •
      Other
      •214•4•0•0•Updated Jun 12, 2025Jun 12, 2025

    • edk2-platforms

      Public
      EDK II sample platform branches and tags
      C
      •
      Other
      •547•0•0•0•Updated Jun 6, 2025Jun 6, 2025

    • nemu_board

      Public
      Shell
      •1•1•0•0•Updated Jun 6, 2025Jun 6, 2025

    • qemu

      Public
      Official QEMU mirror. Please see https://www.qemu.org/contribute/ for how to submit changes to QEMU. Pull Requests are ignored. Please only use release tarballs from the QEMU website.
      C
      •
      Other
      •6.1k•1•0•2•Updated Jun 5, 2025Jun 5, 2025