RISC-V
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riscv-zalasr
Public- This specification will define the RISC-V privilege ISA extensions required to support Supervisor Domain isolation for multi-tenant security use cases e.g. confidential-computing, trusted platform services, fault isolation and so on.
- This specification is integrated into the Priv. and Unpriv. specifications. This repo is no longer maintained. Please refer to the Priv. and Unpriv. specifications at https://github.com/riscv/riscv-isa-manual
- This repository contains the CHERI extension specification, adding hardware capabilities to RISC-V ISA to enable fine-grained memory protection and scalable compartmentalization.
riscv-glossary
Publicdocs-resources
Public- OpenEmbedded/Yocto layer for RISC-V Architecture
riscv-opcodes
Public- The repo contains the SPMP architectural specification, which includes capabilities like access control of read/write/execute requests by an hart, address matching, encoding of permissions, exceptions for access violation, and support for virtualization.
self-hosted-trace
Publicriscv-dot-product
Public- This task group will propose ISA extension(s) and non-ISA hardware and software interop interfaces to enable routine reuse and composition of a subcategory of custom extensions called composable extensions.