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Q extension #445
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Q extension #445
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Timmmm
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Haven't read it all but I skimmed some of it and it mostly looks reasonable. You may want to wait for #448 which will remove at least some of the changes needed. It's waiting for a new version of the Sail compiler to be released.
@Timmmm It seems like the changes needed to either PR based on each other should be relatively minor, so it probably doesn't matter the order they are merged. |
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@Timmmm Thanks for all your earlier comments. I believe I’ve taken care of all of them at this point. I’d appreciate it if you could give this another look. Aside from more rigorous testing (which is being worked on) I think this PR is ready. |
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model/riscv_fdext_regs.sail
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| if (sizeof(flen) == 32) | ||
| then 0x_FFFF @ val_16b | ||
| else 0x_FFFF_FFFF_FFFF @ val_16b | ||
| match (sizeof(flen)) { |
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These boxing/unboxing functions can at least be generic, as in my other commit.
However, unless you are in a hurry for this I kind of feel like it would still be worth:
- Waiting for the new float support in the Sail standard library.
- Update my other MR to use that & make the code more generic.
- Then update this.
That may take a while I'm afraid but I guess you'd noticed that's pretty normal for this project! (Also I'm not the boss here so feel free to seek a second opinion!)
I think we should re-evaluate when there's a new Sail compiler release, which I imagine shouldn't be too long.
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I know there is work being done on quad tests for riscv-arch-test which will want to use the sail model to generate signatures. If those are completed before we get all of the floating point updates into the Sail standard library and make the code more generic, then we may want to revisit merging this sooner but otherwise, I agree.
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@jordancarlin Do you know if anyone is planning to make and tape-out a real chip that implements the Q extension?
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@martinberger The OpenHW Core-V-Wally processor (https://github.com/openhwgroup/cvw) implements the Q extension in some of its configurations. There is an upcoming tape-out planned for it very soon. I'm double checking which configuration is planned for that, but it sounds like it might include Q.
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Complete Q extension implementation including Zfa instructions Based on original work by 'LiuTaowen-Tony' in riscv#187
Adds support for all Q extension instructions plus Q related Zfh and Zfa instructions.
size_encis also updated to have a 3 bit version (size_enc_wide) that supportsQUADword widths.Builds on #187 from @LiuTaowen-Tony. There were lots of merge conflicts from the past 2 years. This resolves them and updates the changes that were made to comply with current conventions (removes effects, compatibility with existing Zfh and Zfa extensions that were added since the original version was written). It also changes the core softfloat interface to use two 64 bit values to avoid the need to create MPZ variables as was done in #187.