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Upd sim for verilator Verilator Simulation #57: Commit b42344d pushed by RDSik
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Upd sim folders Verilator Simulation #56: Commit 3ea082c pushed by RDSik
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Update README.md Verilator Simulation #55: Commit 48953b9 pushed by RDSik
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Upd readme Verilator Simulation #54: Commit b370266 pushed by RDSik
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Merge branch 'master' of https://github.com/RDSik/si5340-config-loader Verilator Simulation #53: Commit 5fd2d86 pushed by RDSik
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Upd cocotb test with verilator Verilator Simulation #52: Commit 95ccada pushed by RDSik
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Add license file Verilator Simulation #51: Commit f837081 pushed by RDSik
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Upd Makefile Verilator Simulation #50: Commit 79e8cde pushed by RDSik
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Upd build Verilator Simulation #49: Commit e4692e5 pushed by RDSik
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Upd env.sv Verilator Simulation #48: Commit b15980c pushed by RDSik
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Upd tb.sv Verilator Simulation #47: Commit 9aa9871 pushed by RDSik
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Upd env.sv Verilator Simulation #46: Commit 113f49f pushed by RDSik
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Upd dockerfile Verilator Simulation #45: Commit 452a280 pushed by RDSik
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Upd dockerfiel Verilator Simulation #44: Commit 9db8526 pushed by RDSik
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Merge branch 'master' of https://github.com/RDSik/si5340-config-loader Verilator Simulation #43: Commit 2a0dff6 pushed by RDSik
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Merge branch 'master' of https://github.com/RDSik/si5340-config-loader Verilator Simulation #42: Commit 0763548 pushed by RDSik
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Update environment.sv Verilator Simulation #41: Commit 4127e37 pushed by RDSik
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dockerfile Verilator Simulation #40: Commit 68abd95 pushed by RDSik
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Upd makefile Verilator Simulation #39: Commit 5089e99 pushed by RDSik
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upd top Verilator Simulation #38: Commit 7b95d39 pushed by RDSik
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upd top Verilator Simulation #37: Commit 552a5cf pushed by RDSik
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upd top Verilator Simulation #36: Commit 91c4ea4 pushed by RDSik
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upd top Verilator Simulation #34: Commit f63d38b pushed by RDSik
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Merge branch 'master' of https://github.com/RDSik/si5340-config-loader Verilator Simulation #33: Commit e2f150b pushed by RDSik
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