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SVA: implement #-# and #=# Build and Test HW-CBMC #2577: Pull request #757 synchronize by kroening
October 8, 2024 15:32 4m 44s followed-by1-fix
followed-by1-fix
October 8, 2024 15:32 4m 44s
Merge pull request #755 from diffblue/synth_expr_rec Build and Test HW-CBMC #2576: Commit e720965 pushed by tautschnig
October 8, 2024 08:43 5m 40s main
main
October 8, 2024 08:43 5m 40s
Merge pull request #752 from diffblue/followed-by1 Build and Test HW-CBMC #2575: Commit c49ab50 pushed by tautschnig
October 8, 2024 08:41 5m 38s main
main
October 8, 2024 08:41 5m 38s
Merge pull request #756 from diffblue/parameters10-test Build and Test HW-CBMC #2574: Commit 5ac7b0c pushed by tautschnig
October 8, 2024 08:36 5m 49s main
main
October 8, 2024 08:36 5m 49s
SVA: implement #-# and #=# Build and Test HW-CBMC #2573: Pull request #757 opened by kroening
October 7, 2024 21:04 3m 34s followed-by1-fix
followed-by1-fix
October 7, 2024 21:04 3m 34s
word-level BMC: allow SVA and/or/implies/iff at property level Build and Test HW-CBMC #2572: Pull request #743 synchronize by kroening
October 7, 2024 20:47 6m 43s sva_and_or_property
sva_and_or_property
October 7, 2024 20:47 6m 43s
Verilog: pull out recursive application of verilog_synthesist::synth_expr Build and Test HW-CBMC #2571: Pull request #755 synchronize by kroening
October 7, 2024 15:57 6m 29s synth_expr_rec
synth_expr_rec
October 7, 2024 15:57 6m 29s
Verilog: test for non-constant parameter Build and Test HW-CBMC #2570: Pull request #756 opened by kroening
October 7, 2024 15:56 5m 35s parameters10-test
parameters10-test
October 7, 2024 15:56 5m 35s
Verilog: pull out recursive application of verilog_synthesist::synth_expr Build and Test HW-CBMC #2569: Pull request #755 synchronize by kroening
October 7, 2024 15:55 5m 55s synth_expr_rec
synth_expr_rec
October 7, 2024 15:55 5m 55s
Verilog: pull out recursive application of verilog_synthesist::synth_expr Build and Test HW-CBMC #2568: Pull request #755 opened by kroening
October 7, 2024 15:47 2m 40s synth_expr_rec
synth_expr_rec
October 7, 2024 15:47 2m 40s
Verilog: extract .lower() method for part select expressions Build and Test HW-CBMC #2567: Pull request #754 opened by kroening
October 7, 2024 14:50 3m 18s part-select-lower
part-select-lower
October 7, 2024 14:50 3m 18s
Merge pull request #753 from diffblue/parameters10 Build and Test HW-CBMC #2566: Commit aeecd2e pushed by tautschnig
October 7, 2024 13:47 5m 36s main
main
October 7, 2024 13:47 5m 36s
Verilog: set type of implicit nets Build and Test HW-CBMC #2565: Pull request #750 synchronize by kroening
October 7, 2024 13:44 5m 27s implicit-nets-type
implicit-nets-type
October 7, 2024 13:44 5m 27s
Verilog: set type of implicit nets Build and Test HW-CBMC #2564: Pull request #750 synchronize by kroening
October 7, 2024 03:13 5m 31s implicit-nets-type
implicit-nets-type
October 7, 2024 03:13 5m 31s
Verilog: reject non-constant parameters Build and Test HW-CBMC #2563: Pull request #753 synchronize by kroening
October 7, 2024 03:08 5m 19s parameters10
parameters10
October 7, 2024 03:08 5m 19s
Verilog: reject non-constant parameters Build and Test HW-CBMC #2562: Pull request #753 synchronize by kroening
October 7, 2024 03:07 6m 1s parameters10
parameters10
October 7, 2024 03:07 6m 1s
Verilog: reject non-constant parameters Build and Test HW-CBMC #2561: Pull request #753 opened by kroening
October 7, 2024 02:57 2m 46s parameters10
parameters10
October 7, 2024 02:57 2m 46s
SVA: add tests for #-# and #=# Build and Test HW-CBMC #2560: Pull request #752 opened by kroening
October 5, 2024 16:18 5m 28s followed-by1
followed-by1
October 5, 2024 16:18 5m 28s
Verilog: set type of implicit nets Build and Test HW-CBMC #2559: Pull request #750 synchronize by kroening
October 4, 2024 18:54 2m 44s implicit-nets-type
implicit-nets-type
October 4, 2024 18:54 2m 44s
Merge pull request #749 from diffblue/nets-implicit Build and Test HW-CBMC #2558: Commit 8bbc75e pushed by tautschnig
October 4, 2024 07:50 6m 4s main
main
October 4, 2024 07:50 6m 4s
Verilog: set type of implicit nets Build and Test HW-CBMC #2557: Pull request #750 opened by kroening
October 4, 2024 01:28 3m 15s implicit-nets-type
implicit-nets-type
October 4, 2024 01:28 3m 15s
Verilog: add tests for implicit nets Build and Test HW-CBMC #2556: Pull request #749 synchronize by kroening
October 4, 2024 01:07 5m 50s nets-implicit
nets-implicit
October 4, 2024 01:07 5m 50s
Verilog: add tests for implicit nets Build and Test HW-CBMC #2555: Pull request #749 synchronize by kroening
October 4, 2024 01:01 5m 32s nets-implicit
nets-implicit
October 4, 2024 01:01 5m 32s
Verilog: add tests for implicit nets Build and Test HW-CBMC #2554: Pull request #749 opened by kroening
October 4, 2024 00:58 5m 46s nets-implicit
nets-implicit
October 4, 2024 00:58 5m 46s
Merge pull request #748 from diffblue/generate-for3 Build and Test HW-CBMC #2553: Commit 5f67dc6 pushed by tautschnig
October 3, 2024 19:16 14m 42s main
main
October 3, 2024 19:16 14m 42s